Nearly every major processor lineup this year boasts TSMC’s 5nm process node with a transistor density of over 200 million per mm square. AMD’s Ryzen 7000 CPU, Radeon 7000, Epyc Genoa, Bergamo, and Siena all leverage the N5 process. Its closest rival, NVIDIA, has also adopted the same process for its GeForce RTX 40 series GPUs and the Hopper H100 data center accelerator. Even Intel will use the same manufacturing technology to fab the iGPU tile of its upcoming 14th Gen Meteor Lake processors.
|Node||Year||Transistor Density||Density Increase|
|7nm FinFET||2018||90-102 million/mm^2||2x|
|5nm FinFET||2020||130-230 million/mm^2||1.8x|
|3nm FinFET||2022||300 million/mm^2||1.3x|
The successor to the 5nm node may not enjoy the same level of success, at least not at the very beginning. TSMC has priced its N3 wafers at $20,000 apiece, 25% higher than the preceding 5nm-class wafers. To top it off, the 3nm process is only 30% denser than its preceding node (N5), which itself was a whopping 80% denser than its predecessor.
At the same time, TSMC’s N3 node doesn’t feature GAA (Gate All Around) technology, something its rival, Samsung’s 3nm process, does include. In the past decade, the latter has suffered from poor yields and high power consumption, but its latest process may turn out to be the winning node.
If the Samsung 3nm node is 10-15% denser or as efficient as the TSMC N5 process, the tide may turn in its favor. We may see the next-gen GeForce RTX 5090 and its siblings fabbed on a Samsung node, as we’ve seen several times in the past. AMD will likely stick to TSMC but may shift certain low-volume chip production to Samsung.
The Korean foundry has already struck deals with multiple chipmakers, including Qualcomm, NVIDIA, IBM, and Baidu. Whether its 3nm capacity reaches acceptable levels remains to be seen.