A while back it was rumored that Intel has planning to change its process node naming scheme to match the transistor densities of rival foundries such as TSMC and Samsung. Today at its Intel Accelerated event, the chipmaker did just that. The 10nm Enhanced SuperFin node which will power the Alder Lake and Raptor Lake processors will be called the Intel 7 process, and the 7nm process slated to power Meteor Lake has been renamed to Intel 4 process. This updated naming puts the American chipmaker’s nodes on par with rival TSMC and Samsung in terms of density and power efficiency.
The Intel 4 node will be succeeded by Intel 3, and finally, Intel 20A which will be based on RibbonFET, a brand new transistor design and PowerVia interconnect technology. Fortunately, no delays were announced in today’s briefing. Alder Lake and the 10nm ESF/Intel 7 node are slated to launch by the end of the year, and Meteor Lake (with its 7nm/Intel 4 node) is planned for an early 2023 release.
|Old Process Name||New Process Name||Roadmap||Products||Features|
Thin Film Barrier
|10ESF||Intel 7||2021 H2||Alder Lake|
|7nm||Intel 4||2023 H1 products||Meteor Lake|
|20% PPW vs 7|
Full EUV use
|5nm||Intel 3||2023 H2 products||TBA||18% PPW vs 4|
Denser HP Library
Increased EUV use
New Perf Libraries
Interestingly, the 10nm ESF (now 7) node brings a performance per watt increase of 10-15% over 10nm SF, more or less on par with what we’ve seen with TSMC’s intermediate (N4, N6) nodes. The 7nm node (now 4) brings full-fledged EUV lithography and a PPW gain of 20% over 10nm SF (now 7). Finally, the 5nm node (now called Intel 3) brings similar performance per watt uplifts (18%), along with denser libraries and increased EUV usage.
Estimates put peak densities of Intel and TSMC nodes (million transistors per mm2) at: (Via)
- TSMC N7: 91= Intel 10nm|7: 101
- TSMC N5: 171 = Intel 7nm|4: 200-250
- TSMC N3: 290 = Intel 5nm|3: ?