TSMC has shared its roadmap for the next three years, emphasizing its future goals with the rest of the industry. The Taiwanese foundry will be shipping its first 3nm (N3) process towards the end of this year, followed by an improved efficiency variant (N3E) in the second or third quarter of 2023. These will be followed by two additional variants of the N3 node, namely N3P (performance), and N3X in 2024, and 2025, respectively.
|2nm vs 3nm (N3E)||3nm (N3E) vs 5nm||3nm vs 5nm||5nm vs 7nm|
|Perf Gain (same TDP)||10-15%||18%||10-15%||30%|
|Efficiency Gain (same perf)||20-30%||34%||25-30%||30%|
|Mass Production||Late 2025||Mid-2023||Late 2022||Q2 2020|
N3 will be roughly 20-30% denser than N5, all the while offering 10-15% more performance at the same TDP or drawing 25-30% less power at the same performance. N3E will be slightly more efficient but like N6, it’s not a new node. Now, moving to the big one: N2. TSMC has pushed its 2nm node all the way to late 2025, and that’s the mass production we’re talking about here. Shipments of the first 2nm chips will begin in 2026.
Chip miniaturization really seems to be reaching its limits as N2 will be just 10% denser than N3E. The performance and efficiency gains are still quite impressive at 15%, and 30%, respectively but there’s a much larger gap between N2 and N3 compared to N5 and N3. We’re looking at three whole years, and during this time TSMC will be offering variants of N3 to customers better suited for their needs.
One man’s loss is another man’s gain, and the same holds true in the semiconductor industry as well. If Intel can manage to deliver on its roadmap (however unlikely as it may seem), it’ll be launching the 14th Gen Meteor Lake processors leveraging the 4nm node in 2023, followed by the 2nm (20A) Arrow Lake lineup in late 2024 or early 2025. This would give Intel an entire year’s lead over TSMC, something that will only extend with the 1.8nm (18A) Lunar Lake processors set to release in late 2025 or early 2026.
It’s also worth noting that Intel will be adopting the GAA (Gate All Around) transistor architecture with its 3nm node in 2023 (RibbonFET) while
Both Intel and TSMC will be implementing GAA with their 2nm nodes, the former in late 2024 and the latter in late 2025. The latter plans on offering different variants of the 2nm node for mobile and HPC clients, something it has already been doing discreetly with AMD and NVIDIA.
A less dense wafer means chips will be more expensive to make, and since virtually all cutting-edge microprocessors are fabbed by either TSMC, Samsung, or Intel, a price hike across the industry is on the horizon. Timely execution and high density may push certain clients, most notably NVIDIA and Qualcomm towards Intel’s 20A node. At the moment though, that’s a mere pipe dream as Intel is yet to deliver a node on time over the last 5 years.