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TSMC Roadmap Update: 4nm, 3nm (FinFet) in 2022; 2nm GAA in R&D

TSMC is the world’s leading foundry, and that status is unlikely to change in the next 4-5 years. The company’s N5 (5nm EUV) node showcased in Apple’s M1 SoCs is the world’s most advanced process, roughly on par with Intel’s 7nm technology which will be launched two years from now (at the earliest). TSMC is planning to spend nearly $30 billion this year on expanding the capacity of its advanced process nodes, including the N7 process used in AMD’s Ryzen 5000 CPUs, the PS5/XSX consoles, and most smartphone SoCs.

For the cutting-edge N5 process, the foundry is planning to expand its capacity to 120-125K wafers per month by the end of the year, allowing its largest clients such as AMD, MediaTek, and Qualcomm to leverage the new node. That’s just the tip of the iceberg, however. TSMC’s N4 (4nm) process which is a refinement of the N5 node is slated to launch with Apple’s next-gen iPhones in the second quarter of 2022, while the N3 (3nm) process is expected to begin mass production in the second half of the year.

N7
vs
16FF+
N7
vs
N10
N7P
vs
N7
N7+
vs
N7
N5
vs
N7
N5P
vs
N5
N4
vs
N5
N3
vs
N5
Power-60%<-40%-10%-15%-30%-10%lower-25-30%
Performance+30%?+7%+10%+15%+5%higher+10-15%
Logic Area

Reduction %

(Density)
70%>37%

~17%0.55x-45%
(1.8x)
NA?0.58x-42%
(1.7x)
Volume
Manufacturing
201820182019Q2 2019Q2 202020212022H2 2022

Before N4, there’s another refinement of N5, called N5P which is slated to begin production in the coming weeks. The N5P process is expected to increase performance (frequency) by 5% or reduce the power consumption by 10% at the same complexity. In comparison, the N5 process was 30% more power-efficient than N7 or 15% faster at the same complexity, with a density increase of up to 1.8x. It’s unclear how much further N4 takes those figures, but we should have more info on the same soon enough.

Finally, as far as the N3 process is concerned, TSMC is aiming for a 25-30% improvement in power efficiency or a 10-15% performance increase at the same density, similar to the N7 to N5 transition. The increase in logic density is expected to be slightly lower at 1.7x. Similar to N4, risk production for N3 is slated for the second half of 2021, with mass production planned for the second half of 2022. We’re likely to see chips based on N3 right alongside Intel’s 7nm parts, once again giving TSMC a full node advantage.

At present, the 7nm process forms the bulk of the Taiwanese foundry’s profits, with N5 rapidly expanding its share. The 5nm process has a wafer share of 20% in 2021, with expected growth to 35-40% next year. There’s also the matter of the more advanced process nodes including 2nm and 1nm which will take advantage of GAA technology. There’s no word on the production timelines of these processes, but R&D is already underway at Fab 12.

Areej

Computer Engineering dropout (3 years), writer, journalist, and amateur poet. I started my first technology blog, Techquila while in college to address my hardware passion. Although largely successful, it was a classic example of too many people trying out multiple different things but getting nothing done. Left in late 2019 and been working on Hardware Times ever since.
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