Chinese foundry, SMIC, and LSI-maker, Innosilicon have announced that they have completed the digital design for the first domestically made chip using the former’s N+1 process technology. As per SMIC’s Liang Mong Song, the company’s N+1 process is “almost the same” as TSMC’s 7nm node in terms of efficiency. That in itself is a bold claim as TSMC’s N7-class nodes are some of the most advanced in the world, second to only its 5nm EUV process.
However, having a closer look at the fundamentals, it’s clear that although N+1 is quite efficient, in terms of performance and density, it’s not quite up there. Compared to SMIC’s own 14nm process, N+1 reduces power consumption by a whopping 57% and logic die area by up to 63%. However, the increase in performance is just around 20%. In comparison, TSMC’s 7nm node, adds up to 35% more performance on going from its 14nm node, with a 55% power efficiency boost and a density 3.3x higher.
Another issue is that the production of SMIC’s N+1 process is much more expensive than TSMC’s 7nm process which directly co-relates with the yields. It should another year or two for yields to improve. So we’re looking at volume production in 2021 or even 2022.
This is primarily due to the fact that SMIC is forced to use 193nm scanners which involves more production steps, masks, and raw materials compared to TSMC’s 7nm (ASML) scanners.
SMIC is looking to introduce EUV technology with its N+2 node, but the recent US restrictions have put that on hold. As per sources, SMIC has already acquired an EUV step-and-scan system, but it hasn’t been installed yet due to the sanctions. (Stylerecap)
It’ll be interesting to see how the N+1 process holds up compared to other advanced processes when it actually starts volume production. However, keep in mind that by then TSMC will already be on its way to mass-produce its 3nm and 2nm processes.
