As per info revealed from a new Linux patch, Intel’s 4th Gen Xeon Scalable Server processors, Sapphire Rapids will feature the Golden Cove core architecture, bypassing Willow Cove entirely. This isn’t surprising since Willow Cove is nearly identical to its predecessor (Sunny Cove) with just a larger memory subsystem. Considering the increasing pressure from AMD in the form of Rome, Milan, and soon Genoa, it makes sense that Intel wouldn’t want to release another refresh in the server market.
#define INTEL_FAM6_TIGERLAKE_L 0x8C /* Willow Cove */ #define INTEL_FAM6_TIGERLAKE 0x8D /* Willow Cove */ -#define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Willow Cove */ + +#define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Golden Cove */ #define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */ #define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
While Milan improved the IPC and single-threaded performance over Rome, Genoa is expected to increase the core count as well. As per sources, we’re likely going to see 96-core parts, and therefore, Intel will once again be left behind in terms of sheer compute density. Sapphire Rapids is supposed to increase the core count from 40 to 56, with some sources hinting at a possible 72-core part as well.
The use of Golden Cove means that Intel will likely retain its single-threaded advantage in the server segment, further bolstered by an improved implementation of AVX512. However, rumors state that AMD is also going to jump onto the 512-bit vector wagon with Zen 4, therefore canceling one of its competitors major advantages. It’ll be interesting to see whether it’s implemented on a native level or not.
