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Intel 12th Gen Alder Lake-S CPUs Spotted w/ 16 Cores, 30MB L3 Cache, PCIe 4 and DDR4 RAM

A benchmark of Intel’s 12th Gen Alder Lake-S CPU has surfaced on the SiSoft Database showing a 16-core processor with a massive 30MB of L3 cache. There are ten 1.25MB blocks of L2 cache and a base clock of just 1.40GHz (likely to change in the future samples).

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This is an anomaly in more ways than one. Firstly, the thread usage varies from test to test. Arithmetic and multi-media report a total of 24 threads which means 12 cores while cryptography reports just 16 threads or 8 cores. This is likely due to the use of a hybrid (high-perf and low-power cores) architecture. While some tests only leverage the high-performance cores (cryptography), the rest seem to be able to use half of both.

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The second discrepancy is with respect to the L2 cache. There are 10 chunks of 1.25MB of L2 cache while the core count is 16. This means that we might be getting a new cache hierarchy with Alder Lake, where the L2 cache is shared across a cluster of cores instead of just one. Then, there’s the matter of the L3 cache. As you can see, the CPU packs a massive L3 buffer of 30MB, nearly on par with a 3rd Gen Ryzen chip. Although the core count is twice as much, this means that Intel will be using a large L3 cache to make up for the higher latency penalty that comes with a hybrid architecture, similar to AMD’s Game Cache.

Lastly, the memory. From, what we know Alder Lake-S will use DDR5 memory, but this test shows the chip supporting DDR4. It’s possible that this is an error, but there’s a chance that the LGA1700 platform may stick to DDR4 instead of DDR5.

There’s also mention of the iGPU. As already seen before, we’re getting 32CUs with a boost clock of around 1.5GHz. It’ll likely be based on the same Gen12 Xe architecture as Tiger Lake.

Alder Lake-S is expected to launch in the first half of 2021, with a mixture of Gracemont and Golden Cove cores, and the enhanced 10nm+++ SuperFet node.

Areej

Computer hardware enthusiast, PC gamer, and almost an engineer. Former co-founder of Techquila (2017-2019), a fairly successful tech outlet. Been working on Hardware Times since 2019, an outlet dedicated to computer hardware and its applications.

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