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Intel 12th Gen Alder Lake Golden Cove-Gracemont Cache Configuration Detailed

By now, we already know a lot about the core configuration of Intel’s upcoming Alder Lake processors, both desktop and mobile. However, the memory subsystem (cache config) has largely been unexplored which is made even more complex considering that Alder Lake will feature a hybrid core architecture. The Golden Cove (hi-performance) and Gracemont (low-power) cores are going to feature separate L1, L2, and L3 caches, and as such will run largely independent of one another.

Note: The featured image is from this page. Apologies to VCZ, it wasn’t intentional. The image has been removed.

Original source

uArchGolden CoveWillow CoveGracemontTremont
L1 Data48 KiB
/12-way
48 KiB
/12-way
32 KiB
/8-way
32 KiB
/8-way
L1 Inst32 KiB
/8-way
32 KiB
/12-way
48 KiB
/8-way
32 KiB
/8-way
L21.25 MiB
/10-way
1.25 MiB
/20-way
2 MiB
/16-way
(per Module)
1.5-4.5 MiB
/12-way
(per Module)
L312 MiB
/12-way
(3 MiB per Core)
12 MiB
/12-way
(3 MiB per Core)
12 MiB
/12-way
(3 MiB per Module)
4 MiB
/16-way

Thanks to a firmware file uploaded to GitHub by Intel’s Linux team (Via), we have a clearer picture of the cache arrangement on Alder Lake, with respect to both Golden Cove and Gracemont cores. It seems that Golden Cove will largely retain the memory subsystem of Willow Cove, featuring 48 KB of L1 Data cache, 32KB of L1 Instruction cache as well as 1.25 MB of L2 cache. However, the way the upper-level caches are arranged has been changed. While L1D is still a 12-way cache, L1I is now an 8-way cache, and lastly, L2 is a 10-way cache (down from 20-way in Willow Cove). L3 cache is still the same at 3 MB per core, with a 12-way mapping scheme.

Areej

Computer Engineering dropout (3 years), writer, journalist, and amateur poet. I started my first technology blog, Techquila while in college to address my hardware passion. Although largely successful, it was a classic example of too many people trying out multiple different things but getting nothing done. Left in late 2019 and been working on Hardware Times ever since.
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