Memory and StorageUncategorized

Difference Between GDDR5 vs DDR5 vs LPDDR5 Memory

Modern computers use many different kinds of memory: DDR4, GDDR5, GDDR6, LPDDR4, HBM, etc. While these are all based on DRAM, there are some key differences between them. DDR4 is used in most PCs as the main memory and is the most popular form of DRAM. GDDR5 and GDDR6 are used in graphics cards as dedicated graphics memory. Although it’s also based on DRAM, it’s somewhat different from DDR4.

Many people get confused between the two and use them interchangeably. There’s also LPDDR4 memory used in smartphones and other mobile devices, and HBM utilized in servers and exascale computers. In this post, we explore the differences between DDR4 and GDDDR5 memory along with a brief explanation of LPDDR4, and how it differs from the former.

DDR4 vs DDR5 vs GDDR5 vs GDDR6

  • Both DDR4 and DDR3 use a 64-bit memory controller per channel which results in a 128-bit bus for dual-channel memory and 256 bit for quad-channel. GDDR5 and DDR5 memory, on the other hand, both use 32-bit controllers. The former can use any number of 32-bit controllers while the latter has two per DIMM.
  • Where CPU memory configurations have wider but fewer channels, GPUs can support any number of 32-bit memory channels. This is the reason many high-end GPUs like the GeForce RTX 2080 Ti and RTX 2080 have a 384-bit and 256-bit bus width, respectively. 

Both the RTX 20 series cards are connected to 1GB memory chips via 8 (for 2080) and 12 (for the Ti) 32-bit memory controllers or channels. GDDR5/6 can also operate in what is called clamshell mode, where each channel instead of being connected to one memory chip is split between two. This also allows manufacturers to double the memory capacity and makes hybrid memory configurations like the GTX 660 with its 192-bit bus width possible.

The GTX 670 has four 512 MB chips across eight channels
A GTX 660 Ti has four memory stacks, the ones on top (packing two per stack) in clamshell mode. This reduces the bus width to 192-bit rather than 256-bit
clamshell mode
  • Another core difference between DDR4/5 and GDDR5/6 memory involves the I/O cycles. Just like SATA, DDR4 can only perform one operation (read or write) in one cycle. GDDR5 can handle input (read) as well as output (write) on the same cycle, essentially doubling the bus width.
  • GDDR5 was succeeded by GDDR5X which was more of a half-generation upgrade of sorts. GDDR5X features transfer rates of up to 14GBit/s per pin, twice as much as GDDR5 while also reducing the voltage from 1.5v to 1.35v.
  • This was achieved by using a higher prefetch. Unlike GDDR5, GDDR5X has a 16n prefetch architecture (vs 8n on G5). This allows it to fetch 64-bytes (512-bits) of data per cycle (per channel) while GDDR5 was limited to 32-bytes (256-bits). Similarly, GDDR5X also has a higher burst length of 16 (like DDR5) which allows the memory to fetch up to a 64B cache line per transfer. GDDR5 and DDR4 are limited to a burst length of 8 (or 32B x 2 per cycle) and an 8n prefetch.
  • GDDR6, like GDDR5X, has a 16n prefetch but it’s divided into two channels. Therefore, GDDR6 fetches 32 bytes per channel for a total of 64 bytes just like GDDR5X and twice that of GDDR5. While this doesn’t improve memory transfer speeds over GDDR5X, it allows for more versatility. The burst length is also the same as GDDR5X at 16 (64B).
  • GDDR6 can fetch the same amount of data as GDDR5X but in two separate channels, allowing it to function like two smaller chips instead of one, in addition to a wider single one.
  • Other than that, GDDR6 also increased the density to 16Gb (2x compared to GDDR5X, with a JEDEC max of 32Gb) and significantly improves bandwidth by increasing the base clock from 12Gbps to up to 14Gbps (16Gbps max).


LPDDR4 is the mobile equivalent of DDR4 memory. Compared to DDR4, it offers reduced power consumption but does so at the cost of bandwidth. LPDDR4 has dual 16-bit channels resulting in a 32-bit total bus. In comparison, DDR4 has 64-bit channels.

However, at the same time, LPDDR4 has a prefetch of 16n per channel for a total of (16 words x 16 bit) 256 bits/32 bytes. That results in an overall of 512 bits or 64 bytes for both the channels.

DDR4, on the other hand, has two 8n prefetch banks per channel. The two banks are separate and can execute two independent 8n prefetches. This is done by using a multiplexer to time division multiplex its internal banks.

Compared to DDR4, LPDDR4 offers reduced power consumption but does so at the cost of bandwidth. LPDDR4 has dual 16-bit channels resulting in a 32-bit total bus. In comparison, DDR4 has 64-bit channels.

LPDDR4 also has a more flexible burst length ranging from 16 to 32 (256 or 512 bits/ 32 or 64 bytes. DDR4, on the other hand, is limited to 8 bursts per cycle (or 128 bits), although each bank can perform additional transfers.

This design makes LPDDR4 much more power-efficient compared to standard DDR4 memory, making it ideal for use in smartphones with battery standby times of up to 8-10 hours. Micron’s LPDDR4 RAM tops out the standard with a 2133 MHz clock for a transfer rate of 4266 MT/s while Samsung follows shortly after with a clock of 1600MHz and a transfer rate of 3200 MT/s.

Similar to DDR5, LPDDR4X reduces the voltage and power draw. It cuts down the I/O voltage by 50% (1.12 to 0.61v), greatly reducing the power draw for both the memory as well as the memory controllers.

In addition, the speed has also been increased from 3200MT/s to 4266MT/s (without OC). Finally, it takes lesser space on-chip and a single package can consist of up to 12GB of DRAM. On the downside, LPDDR4X isn’t backward compatible with LPDDR4. Even if a device is compatible with faster LPDDR4 memory, it may not work with LPDDR4X.


LPDDR5 is even more power-efficient than LPDDR4x. Thanks to the use of Dynamic Voltage Scaling (DVS), it adjusts the voltage and in turn the memory frequency as per load. Like LPDDR4/4x, LPDDR5 also features dual-16-bit channels, as well as a burst length of up to 32 (mostly 16).

As already mentioned, DDR5 memory features two 32-bit channels per DIMM, with a burst length and prefetch of 16n per channel. Both DDR5 and LPDDR5 will support speeds up to 6400 Mbps as per the JEDEC standard, although we won’t see them with the first wave of modules. LPDDR5 also increases the density up to 32Gb per channel with operating voltages as low as 1.05/0.9V for VDD and 0.5/0.35V for I/O.

Device size2Gb to 32Gb (per channel) 4, 8, and 16 bank devices 1k, 2k, and 4k page sizes2Gb to 16Gb (per channel) 8 bank devices 2k page sizes
SpeedUp to 6400 MbpsUp to 4266 Mbps
Voltage1.8V DRAM array 1.05V / 0.9V core 0.5V / 0.3 V I/O1.8V DRAM array 1.1V core 1.1V / 0.6V I/O

Thanks to the use of Dynamic Voltage Scaling (DVS), LPDDR5 can support two voltage modes: 1.05V (C) and 0.5V (I/O), while operating at higher frequencies and 0.9V (C) and 0.3V (I/O) while operating at lower frequencies.

LPDDR5 features include a new scalable clocking architecture for command/address (C/A) clock (CK) to allow easier SoC timing closure, and most of the features of DDR5 such as decision feedback equalizer (DFE), Write X feature to save power, and link ECC to enhance memory channel RAS.

This image has an empty alt attribute; its file name is SK_hynix_DDR5_Advantages1-892x1024.png

Lastly, LPDDR5 also has a more flexible bank structure. While DDR5 packs 32 banks, its mobile variant can vary from 4 to 16 banks, as well as up to four bank groups (although 1-2 is the norm).

Overall, LPDDR5 improves the power efficiency, along with the frequency and bandwidth of mobile memory, all the while retaining the flexibility that LPDDR4/LPDDR4x is known for.


Computer Engineering dropout (3 years), writer, journalist, and amateur poet. I started my first technology blog, Techquila while in college to address my hardware passion. Although largely successful, it was a classic example of too many people trying out multiple different. Left late 2019 and been working on Hardware Times ever since.
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