JEDEC has finalized the memory specs for the next-gen DDR5 memory standard, doubling both memory density as well as speeds. While a single DDR4 memory chip was limited to a density of 2GB, DDR5 can go as high as 8GB per die with stacking allowing as much as 128GB per package for server UDIMMs.
The next core upgrade is of course in terms of memory speed. DDR5 is going to be a big step up from DDR4 memory, with the very first modules expected to be clocked at 4.8Gbps, with a maximum rated speed of 6.4Gbps. Just like existing DDR4 offerings, we’ll almost certainly see vendors coming out with considerably faster modules, Micron’s 8.4Gbps chips being a prime example.
|Data Rate||6.4 Gbps||3.2 Gbps||1.6 Gbps||6.4Gbps|
|Channel Width||64-bits (2×32)||64-bits||64-bits||16-bits|
This huge leap in speed was facilitated via two major overhauls. Firstly, similar to GDDR6 and LPDDR4, the memory bus has been split into two independent 32-bit channels, with each of them featuring a burst length of 16 bytes. In comparison, DDR4 had a burst length of just 8 bytes per channel. To keep up with the increase in burst length, the prefetch has also benn doubled to 16n in DDR5 from 8n in DDR4. This puts it on par with GDDR6 and LPDDR4x and LPDDR5 memory.
As tradition demands, the memory bank groups have been doubled, though the number of banks per group is unchanged at four. The voltage (VDDC) has also been slightly reduced from 1.2v in DDR4 to 1.1v in DDR5.
Finally, the pin count is unchanged, although, the pin out has been overhauled to facilitate the new dual-channel configuration. As such, DDR5 won’t be backwards compatible with DDR4 motherboards.
As far as availability goes, we won’t be seeing any commercial supply of DDR5 memory anytime soon as none of the existing CPUs support it. AMD’s Zen 4 processors and Intel’s 12th Gen Alder Lake CPUs should add support for the new memory standard, so expect to see DDR5 after 18-24 months.