AMD plans to launch the Zen 4 V-Cache processors next month, following late last year’s Raphael release. Team Red will roll out three new SKUs leveraging the 3D V-Cache technology, including the Ryzen 7 7800X3D, Ryzen 9 7900X3D, and the 7950X3D. Unfortunately, the dual-CCD chips won’t get dedicated cache dies for each chiplet. Consequently, all three V-Cache CPUs will feature the same 3D stacked L3 cache die with the same amount of SRAM.
This harkens to the Zen 1 launch when the disaggregated or chiplet architecture was first introduced. Several applications faced lags and stutters on account of the high cache latency. The dual-CCX design of the Ryzen 1000 CPUs led to unconventionally high latency in workloads that weren’t specifically optimized for them.
The cache latency became an issue when a core or thread tried to access data from the L3 cache of another CCX module. Since the cache slices of the neighboring module were physically farther from its own, this would lead to a stall, thereby causing stutters and lags. The only way to address this was by teaching the Windows scheduler to store all data relevant to a core in its own respective CCX cache slice.
Of course, such a broad optimization took years to kick in fully, and AMD eventually abandoned the CCX with Zen 3, unifying the L3 cache for the entire CCD. Inter-CCD transactions are still quite expensive, which is why it’s compute-intensive workloads like rendering that benefit most from the dual-CCD Ryzen 9 processors.
The Ryzen 7000 3D V-Cache will bring back similar problems. AMD has essentially slapped a secondary compute chiplet without a separate cache die of its own. Therefore, games that use a single 8-core CCD will run just fine, but the few heavily threaded titles like 4X, strategy, and expansive open-word won’t fully benefit much from the additional cores of the second CCD.
In more cases than not, the vanilla CCD will try to access the data on the V-Cache die of the other chiplet, leading to the same old problems we saw with Zen 1.
AMD is working with Microsoft on Windows optimizations that will work in tandem with a new AMD chipset driver to identify games that prefer the increased L3 cache capacity and pin them into the CCD with the stacked cache. Other games that prefer higher frequencies over increased L3 cache will be pinned into the bare CCD. AMD says that the bare chiplet can access the stacked L3 cache in the adjacent chiplet, but this isn’t optimal and will be rare. Yes, the chip with the extra L3 cache will run games at a slower speed, but most games don’t operate at peak clock rates, so you should still get a huge performance benefit.Via: TomsHardware
AMD is working on a whitelist to assign applications to a CCD based on their requirements. Early driver data indicates that there are three lists, namely “Default”, “Game Mode”, and “Mixed Reality”. League of Legends has been assigned to the first, and most other titles to the second. In contrast, other compute-oriented applications will likely adopt the non-cache die as the primary chiplet.
As you can guess, this will get messy, and the Ryzen 9 V-Cache SKUs may be completely and utterly redundant. We’re looking at two halo products *cough* 13900KS *cough* that are marginally faster than the Ryzen 7 7800X3D.