Igor has shared the preliminary specs of three Zen 3 based Epyc Milan samples including the core counts, cache and clock speeds. Keep in mind that these are still engineering samples and the final specs will likely vary. Let’s have a look:
Two of these are 64-core parts while the third one is a 32-core chip. All the CPUs have a base clock of 1.2GHz with the boost states varying across the three. The 32-core variant has a maximum boost of 3GHz and so does one of the 64-core parts. The other one is limited to 2.2GHz. Interestingly, memory support and cache sizes are unchanged. Both the 64-core Milan parts come with 256MB of L3 cache while the 32-core variant has half as much. This is the same L3 cache amount as the existing Epyc Rome processors.
At the same time, the L3 cache arrangement is expected to change with Zen 3. Instead of a single CCX, the L3 cache is going to be uniform across both the CCXs on a CCD. As such, a set of eight cores and their respective L1 and L2 cache will share the same (larger) L3 cache chunk.
AMD’s Epyc Milan CPUs are expected to ship in Q4 2020 with the consumer-grade Ryzen 4000 processors expected around the same time. Intel is also expected to launch its 10nm Ice Lake-SP processors later this year, but unlike Cooper Lake, these will be limited to 1S and 2S configurations with each chip packing a maximum of 28 cores. The first major 10nm server chip from Intel is slated to launch in the last quarter of 2021.