AMD may shift to an octa-core CCX design with its 4th Gen Cezanne APUs. As per sources, both the AM4 and FP6 (mobile) Cezanne processors will feature a revamped chiplet design, with twice as many cores (eight vs four in Renoir).
The motivations for this new chiplet architecture with APUs are primarily driven by power and latency considerations. A lower CCX count will result in a reduced power draw and improved latency which is critical in mobile devices. Making a separate chip separately for the AM4 platform makes little sense, so AMD most likely decided to go with the same design for both.
We know that the 4th Gen Ryzen and Epyc Milan CPUs will feature a unified L3 cache, with all the eight cores on the CCD sharing the same 32MB cache. This should improve hit rates and better latency as well. It’s possible that AMD is simply dissolving the concept of CCXs and using a large unified CCD instead with Zen 3.
After all, other than in technical diagrams, a CCD is the basic building block of all Ryzen and Epyc CPUs. One of the primary advantages of switching to a single CCX design would be improved gaming performance due to reduced core-to-core latency within a chiplet which is the only segment where Intel still leads. The above diagram indicates a similar approach.
The 4th Gen Ryzen processors will leverage the Zen 3 core architecture but retain the 7nm process node. A more mature form of the latter should allow for healthy boosts in the operating clocks with potentially attractive offerings for overclockers.