AMD Van Gogh APUs to Top Out at 4 Cores/8 Threads: 12 PCIe Gen 3 Lanes and AV1 Decode

The specifications of AMD’s upcoming Van Gogh APUs have been leaked by Pat Schur. As per Schur, Van Gogh will top out at four cores (eight threads with SMT), with up to 12 PCIe Gen 3 lanes and four USB 3.2 Gen 2 ports. There will be four display controllers and up to eight USB 2.0 ports, out of which four will be shared with the 3.2 units.

Out of the 12 PCIe 3.0 lanes, two will be multiplexes with the SATA channels, so we’re looking at effectively 10 lanes.

Van Gogh will also come with AV1 decode support similar to Navi 2x and NVIDIA’s Ampere graphics cards.

Source: Videocardz.com

This makes sense as VG is supposed to be a 7nm part with Zen 2 cores and an RDNA 2 GPU paired with LPDDR5/LPDDR4X memory. Unlike Cezanne and Rembrandt, it’ll be a successor to Dali, the sub-15W mobile offering for Chromebooks and budget student notebooks:


Compared to the Dali chips, we’re still looking at 2x increase in the core count and a massive IPC uplift (Zen>Zen 2) on the CPU side and a completely new GPU architecture on the graphics side (Vega/GCN>RDNA2/Navi2).


Computer Engineering dropout (3 years), writer, journalist, and amateur poet. I started my first technology blog, Techquila while in college to address my hardware passion. Although largely successful, it was a classic example of too many people trying out multiple different things but getting nothing done. Left in late 2019 and been working on Hardware Times ever since.

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