The chiplet design has been one of the primary factors behind AMD’s recent success in the CPU market. Arch-rival Intel still uses monolithic processors which limits it to 28-core parts in the server space and just 10-core designs in the consumer segment. Now AMD is looking at further expanding that gap with the help of advanced packaging technologies being developed by foundry partner, TSMC.
TSMC is reportedly working on bringing its 3D stacking technology known as SoIC to the market with the help of AMD and Google. Similar to how HBM memory includes stacks of high-bandwidth chips, this will allow TSMC to fabricate CPUs with stacked dies. Similar to how the chiplet design has allowed for 64-core CPUs such as the AMD Rome CPUs, this will further increase the raw compute performance (number of dies) on a single substrate without increasing the power and die area by much.
TSMC is planning to implement the SoIC design at a foundry in Miaoli where a new plant is presently being built. The construction of this facility is slated to complete next year with mass production starting in 2022. That means AMD’s Zen 5 based CPUs might just come with 3D stacking, drastically increasing the total possible core count, especially on server parts.
While it’s too early to say for certain, it’d be fair to say that AMD will likely retain its lead in the CPU segment if it continues to make progress at the current rate. The latest Ryzen 5000 CPUs have finally taken the gaming crown from Intel, but Team Blue still has a lot to lose and vise versa.