The specifications of AMD’s upcoming MCM-based Instinct 200 accelerator have surfaced. The details come from the well-reputed tipster, @ExecuFix. According to the source, the MI200 will have two variants, namely the MI250 and MI2150X. Both the SKUs will be fabbed on TSMC’s N7 node, and will feature HBM2e memory,
The exact specifications of the MI2150X have been shared. It’ll consist of a total of 110 CUs with a boost clock of 1.7GHz. This means that we’re likely looking at eight memory stacks, each featuring eight 2GB dies. This indicates a total bus width of 8,196-bits (1,024-bits x8 controllers), resulting in an overall bandwidth of 3.68 TB, roughly the same as the HBM variants of Sapphire Rapids-SP.
At the heart of the GPU core, there will be two 55 CU chiplets, resulting in an overall compute strength of 110 CU, with an impressive boost clock of 1.7GHz. Since Alderbaran can execute double-precision instructions (FP64) at native speeds, this will result in a double-precision throughput of 47.9 TFLOPs, an insane four times more than its predecessor, the MI100.
Even NVIDIA’s Ampere-based A100 Tensor core accelerator is capable of “only” 19.5 TFLOPs of FP64 compute. In terms of mixed-precision compute, we’re looking at 383 TFOPs of FP16 and BFLOAT16. In comparison, the MI100, topped out at “just” 184 and 92 TFLOPs in the two data types, respectively.
The MI250X will have a TDP of 500W which is a bit on the high side but is likely a result of the HBM memory. The MI250 should come will a lower boost clock and possibly lesser memory as well. A scalpel to the GPU core is unlikely but I wouldn’t rule it out.
The AMD Radeon Instinct MI200 GPU will, over the next year, begin to power three massive systems on three continents: the United States’ exascale Frontier system; the European Union’s pre-exascale LUMI system; and Australia’s petascale Setonix system.
