AMD CEO to Visit TSMC Later this Month to Discuss 3nm Capacity for Zen 5 CPUs/RDNA 4 GPUs

AMD CEO Dr. Lisa Su is planning to visit Taiwan alongside company executives to bolster advanced process capacity and wafer allocation. As expected, TSMC will be one of the primary partners the chipmaker plans to engage during this high-level visit. Dr. Su will discuss Team Red’s 3nm (N3) and maybe even 2nm (N2) wafer shares, forming the backbone of the Zen 5 family.

It’s worth noting that, as of now, AMD has planned its next-gen processors around the assumption that N3 could be delayed and N4 might have to be adopted instead. RDNA 4 will almost certainly be an N4 family with a slightly delayed or staggered launch.

AMD plans on launching its Zen 5 lineup sometime by 2024. TSMC’s first wave of 3nm offerings will ship in the latter half of 2022, leaving ample time for 2nd Tier clients like AMD and MediaTek to finalize wafer deals. Meanwhile, N2 is slated for mass production in the second half of 2025, followed by widespread adoption towards the end of 2026.

In addition to process nodes, packaging technologies such as TSMC’s SoIC are also key to designing cutting-edge microprocessors in today’s age. With the release of the Ryzen 7 5800X3D and the Epyc Milan-X chips (and soon RDNA 3), their prominence will only grow. Dr. Su will also meet representatives from supply partners, including Unimicron Technology, Nan Ya PCB, and ASMedia.

Source: DigiTimes (via: TomsH)


Computer hardware enthusiast, PC gamer, and almost an engineer. Former co-founder of Techquila (2017-2019), a fairly successful tech outlet. Been working on Hardware Times since 2019, an outlet dedicated to computer hardware and its applications.

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